Title :
CMOS circuit for MOS transistor threshold adjustment: a means for neural network weight adjustment
Author :
El-Leithy, N. ; Zaghloul, M.E. ; Newcomb, R.W.
Author_Institution :
Dept. of Electr. Eng., Maryland Univ., College Park, MD, USA
Abstract :
Summary form only given. A new CMOS circuit is described that behaves like an MOS transistor with a threshold voltage that is easily adjusted by external control. The circuit is designed to be used in neural-type circuit applications, where threshold voltage adjustments can act to fix the connection weights which determine the amount of transmission from one neuron´s output to another neuron´s input. The circuit uses capacitive coupling between the input gate of the MOS transistor and a controlling input voltage through a differential amplifier-type circuit. In some cases, the capacitive coupling need only involve parasitic capacitors, so that no extra capacitor needs to be inserted. The PSPICE simulation program was used to simulate the circuit, giving the V-I characteristics of the device for different controlling voltages
Keywords :
CMOS integrated circuits; circuit CAD; differential amplifiers; digital simulation; neural nets; CMOS circuit; MOS transistor threshold adjustment; PSPICE simulation program; V-I characteristics; capacitive coupling; connection weights; differential amplifier-type circuit; input gate; neural network weight adjustment; neural-type circuit applications; parasitic capacitors; threshold voltage; CMOS process; Circuit simulation; Coupling circuits; Laboratories; MOS capacitors; MOSFETs; Neural networks; Nonvolatile memory; SPICE; Voltage control;
Conference_Titel :
Circuits and Systems, 1989., IEEE International Symposium on
Conference_Location :
Portland, OR
DOI :
10.1109/ISCAS.1989.100574