DocumentCode
1649744
Title
An analog MOS implementation of the synaptic weights for feedback neural nets
Author
Salam, F.M.A. ; Khachab, N. ; Ismail, M. ; Wang, Y.
Author_Institution
Dept. of Electr. Eng., Michigan State Univ., East Lansing, MI, USA
fYear
1989
Firstpage
1223
Abstract
The authors introduce a MOS-based realization of the synaptic weight problem for neural nets. The realization is achieved via an adaptation of continuous-time analog multipliers where the weights are assigned as positive or negative voltage levels. The neural network is then realized by double inverters interconnected through the introduced analog multipliers. Using only a single operational amplifier, each analog multiplier is capable of realizing the scalar product ΣT ijV j, j =1, . . ., n , and i is fixed, where V j; is the output neuron and T ij is the assigned positive or negative weight. The authors demonstrate the functionality of the feedback neural networks with MOS-based multipliers using a two-neuron example
Keywords
MOS integrated circuits; analogue circuits; multiplying circuits; neural nets; MOS-based multipliers; analog MOS implementation; continuous-time analog multipliers; double inverters; feedback neural nets; functionality; negative voltage levels; operational amplifier; positive voltage levels; scalar product; synaptic weights; Feedback circuits; Inverters; Neural network hardware; Neural networks; Neurofeedback; Neurons; Operational amplifiers; Optical amplifiers; Very large scale integration; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1989., IEEE International Symposium on
Conference_Location
Portland, OR
Type
conf
DOI
10.1109/ISCAS.1989.100575
Filename
100575
Link To Document