• DocumentCode
    1649986
  • Title

    Digital VLSI implementation of a neural processor

  • Author

    Castillo, F. ; Moreno, J.M. ; Cabestany, J.

  • Author_Institution
    Dept. de Ingenieria Electron., Univ. Politecnica de Catalunya, Barcelona, Spain
  • fYear
    1991
  • Firstpage
    307
  • Abstract
    The design of a digital neural processor based on a VLSI architecture is discussed. Each processor is an element of a systolic array capable of performing the backpropagation algorithm. The processor´s internal structure and its characteristics are discussed
  • Keywords
    VLSI; microprocessor chips; neural nets; systolic arrays; VLSI architecture; backpropagation algorithm; digital neural processor; systolic array; Algorithm design and analysis; Arithmetic; Communication system control; Equations; Neural networks; Neurons; Process design; Systolic arrays; Telecommunications; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrotechnical Conference, 1991. Proceedings., 6th Mediterranean
  • Conference_Location
    LJubljana
  • Print_ISBN
    0-87942-655-1
  • Type

    conf

  • DOI
    10.1109/MELCON.1991.161838
  • Filename
    161838
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1649986