Title :
Digital VLSI implementation of a neural processor
Author :
Castillo, F. ; Moreno, J.M. ; Cabestany, J.
Author_Institution :
Dept. de Ingenieria Electron., Univ. Politecnica de Catalunya, Barcelona, Spain
Abstract :
The design of a digital neural processor based on a VLSI architecture is discussed. Each processor is an element of a systolic array capable of performing the backpropagation algorithm. The processor´s internal structure and its characteristics are discussed
Keywords :
VLSI; microprocessor chips; neural nets; systolic arrays; VLSI architecture; backpropagation algorithm; digital neural processor; systolic array; Algorithm design and analysis; Arithmetic; Communication system control; Equations; Neural networks; Neurons; Process design; Systolic arrays; Telecommunications; Very large scale integration;
Conference_Titel :
Electrotechnical Conference, 1991. Proceedings., 6th Mediterranean
Conference_Location :
LJubljana
Print_ISBN :
0-87942-655-1
DOI :
10.1109/MELCON.1991.161838
