DocumentCode
1650066
Title
A computation engine for the FFT/FCT/FHT using AT&T DSP32
Author
Li, Weiping ; Sidharta, Irwan L. ; Fetteerman, H.S.
Author_Institution
Dept. of Comput. Sci. & Electron. Eng., Lehigh Univ., Bethlehem, PA, USA
fYear
1989
Firstpage
1272
Abstract
The AT&T DSP32 chip, a programmable digital signal processor with a 32-b floating-point arithmetic unit and a 16-MHz operation rate, can be used for computing the discrete Fourier, cosine, and Hartley transforms. A single common structure is developed to ensure both high performance and a high degree of flexibility. Some real-time implementation issues are discussed
Keywords
digital signal processing chips; fast Fourier transforms; real-time systems; 32 bits; AT&T DSP32 chip; DFT; Hartley transforms; computation engine; cosine transform; flexibility; floating-point arithmetic unit; programmable digital signal processor; real-time implementation; Application software; Digital signal processing; Digital signal processing chips; Digital signal processors; Discrete Fourier transforms; Engines; Hardware; High performance computing; Libraries; Signal processing algorithms;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1989., IEEE International Symposium on
Conference_Location
Portland, OR
Type
conf
DOI
10.1109/ISCAS.1989.100587
Filename
100587
Link To Document