DocumentCode :
1650242
Title :
SURF algorithm in FPGA: A novel architecture for high demanding industrial applications
Author :
Battezzati, N. ; Colazzo, S. ; Maffione, M. ; Senepa, L.
Author_Institution :
Skytechnology, Torino, Italy
fYear :
2012
Firstpage :
161
Lastpage :
162
Abstract :
Today many industrial applications require object recognition and tracking capabilities. Feature-based algorithms are well-suited for such operations and, among all, Speeded Up Robust Features (SURF) algorithm has been proved to achieve optimal results. However, when high-precision and real time requirements come together, a dedicated hardware is necessary to meet them. In this paper we present a novel architecture for implementing SURF algorithm in FPGA, along with experimental results for different industrial applications.
Keywords :
field programmable gate arrays; reconfigurable architectures; FPGA; SURF algorithm; feature-based algorithms; high demanding industrial applications; object recognition; object tracking; speeded up robust features algorithm; Clocks; Computer architecture; Detectors; Field programmable gate arrays; Real time systems; Robustness; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012
Conference_Location :
Dresden
ISSN :
1530-1591
Print_ISBN :
978-1-4577-2145-8
Type :
conf
DOI :
10.1109/DATE.2012.6176451
Filename :
6176451
Link To Document :
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