• DocumentCode
    1650762
  • Title

    Latchup in merged triple well structure

  • Author

    Voldman, S. ; Gebreselasie, E. ; Zierak, Michael ; Hershberger, D. ; Collins, D. ; Feilchenfeld, N. ; St Onge, S. ; Dunn, J.

  • Author_Institution
    IBM Microeletronics, Essex Junction, VT, USA
  • fYear
    2005
  • Firstpage
    129
  • Lastpage
    136
  • Keywords
    BiCMOS integrated circuits; CMOS integrated circuits; MOSFET; electrostatic discharge; isolation technology; semiconductor device measurement; semiconductor device models; semiconductor device reliability; ESD; RF BiCMOS; RF CMOS; SiGe; dual-well structures; isolated MOSFET; isolating buried layers; latchup measurements; merged triple well structure latchup; BiCMOS integrated circuits; CMOS technology; Circuit noise; Germanium silicon alloys; Isolation technology; MOSFETs; Noise reduction; Radio frequency; Silicon germanium; Substrates;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reliability Physics Symposium, 2005. Proceedings. 43rd Annual. 2005 IEEE International
  • Print_ISBN
    0-7803-8803-8
  • Type

    conf

  • DOI
    10.1109/RELPHY.2005.1493074
  • Filename
    1493074
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1650762