• DocumentCode
    1651054
  • Title

    An evolutionary algorithm for the multi-objective optimisation of VLSI primitive operator filters

  • Author

    Thomson, Robert ; Arslan, Tughrul

  • Author_Institution
    Dept. of Electron. & Electr. Eng., Edinburgh Univ., UK
  • Volume
    1
  • fYear
    2002
  • Firstpage
    37
  • Lastpage
    42
  • Abstract
    This paper introduces an evolvable hardware system for the generation of optimised FIR filter designs. This system converts the frequency domain specification of a filter directly into a circuit netlist. The filter designs are optimised with respect to an accurate model of the silicon area and latency
  • Keywords
    FIR filters; VLSI; circuit CAD; circuit optimisation; evolutionary computation; integrated circuit design; VLSI primitive operator filters; Verilog; circuit designs; circuit netlist; circuit optimisation; evolutionary algorithm; evolvable hardware; evolvable hardware system; frequency domain specification; latency; multi-objective optimisation; optimised FIR filter design; silicon area; Circuit optimization; Circuit synthesis; Circuit testing; Delay; Design optimization; Evolutionary computation; Finite impulse response filter; Hardware; Silicon; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Evolutionary Computation, 2002. CEC '02. Proceedings of the 2002 Congress on
  • Conference_Location
    Honolulu, HI
  • Print_ISBN
    0-7803-7282-4
  • Type

    conf

  • DOI
    10.1109/CEC.2002.1006206
  • Filename
    1006206
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1651054