DocumentCode :
1651071
Title :
Stress migration reliability of wide CU interconnects with gouging vias
Author :
Lim, Y.K. ; Arijit, R. ; Pey, K.L. ; Tan, C.M. ; Seet, C.S. ; Lee, T.J. ; Vigar, D.
Author_Institution :
Chartered Semicond. Manuf. Ltd., Singapore, Singapore
fYear :
2005
Firstpage :
203
Lastpage :
208
Keywords :
diffusion barriers; finite element analysis; integrated circuit interconnections; semiconductor device reliability; stress effects; thermal stresses; voids (solid); 1000 hour; 150 to 200 C; 3D FEA; Cu; FEM; Si3N4; diffusion barrier layer coverage; gouging vias; high temperature stressing; process-induced weak points; silicon nitride cap/via interface; stress distribution; stress gradient; stress migration reliability; stress-induced voids; tensile stress; three dimensional finite element analysis; via chain structure; void nucleation; wide copper interconnects; Argon; Artificial intelligence; Copper; Fabrication; Integrated circuit interconnections; Lead; Pulp manufacturing; Samarium; Tensile stress; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reliability Physics Symposium, 2005. Proceedings. 43rd Annual. 2005 IEEE International
Print_ISBN :
0-7803-8803-8
Type :
conf
DOI :
10.1109/RELPHY.2005.1493085
Filename :
1493085
Link To Document :
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