DocumentCode
1651697
Title
MSGR-based low latency complex matrix inversion architecture
Author
Ma, Lei ; Dickson, Kevin ; McAllister, John ; McCanny, John
Author_Institution
Inst. of Electron. Commun. & Inf. Technol., Queen´´s Univ., Belfast
fYear
2008
Firstpage
410
Lastpage
413
Abstract
This paper presents a matrix inversion architecture based on the novel Modified Squared Givens Rotations (MSGR) algorithm, which extends the original SGR method to complex valued data, and also corrects erroneous results in the original SGR method when zeros occur on the diagonal of the matrix either initially or during processing. The MSGR algorithm also avoids complex dividers in the matrix inversion, thus minimising the complexity of potential real-time implementations. A systolic array architecture is implemented and FPGA synthesis results indicate a high-throughput low-latency complex matrix inversion solution.
Keywords
field programmable gate arrays; matrix inversion; FPGA synthesis; MSGR; complex dividers; low latency complex matrix inversion; modified squared givens rotations algorithm; Computer architecture; Delay; Field programmable gate arrays; Hardware; Iterative methods; MIMO; Matrices; Matrix decomposition; Signal processing algorithms; Systolic arrays;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing, 2008. ICSP 2008. 9th International Conference on
Conference_Location
Beijing
Print_ISBN
978-1-4244-2178-7
Electronic_ISBN
978-1-4244-2179-4
Type
conf
DOI
10.1109/ICOSP.2008.4697158
Filename
4697158
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