• DocumentCode
    1651866
  • Title

    On the optimality of K longest path generation algorithm under memory constraints

  • Author

    Jiang, Jie ; Sauer, Matthias ; Czutro, Alexander ; Becker, Bernd ; Polian, Ilia

  • Author_Institution
    Dept. of Inf. & Math., Univ. of Passau, Passau, Germany
  • fYear
    2012
  • Firstpage
    418
  • Lastpage
    423
  • Abstract
    Adequate coverage of small-delay defects in circuits affected by statistical process variations requires identification and sensitization of multiple paths through potential defect sites. Existing K longest path generation (KLPG) algorithms use a data structure called path store to prune the search space by restricting the number of sub-paths considered at the same time. While this restriction speeds up the KLPG process, the algorithms lose their optimality and do not guarantee that the K longest sensitizable paths are indeed found. We investigate, for the first time, the effects of missing some of the longest paths on the defect coverage. We systematically quantify how setting different limits on the path-store size affects the numbers and relative lengths of identified paths, as well as the run-times of the algorithm. We also introduce a new optimal KLPG algorithm that works iteratively and pinpointedly addresses defect locations for which the path-store size limit has been exceeded in previous iterations. We compare this algorithm with a naïve KLPG approach that achieves optimality by setting the path-store size limit to a very large value. Extensive experiments are reported for 45nm-technology data.
  • Keywords
    delay circuits; digital storage; network routing; statistical analysis; K longest path generation algorithm; memory constraints; path-store size limit; search space; small-delay defects; statistical process variations; Circuit faults; Data structures; Delay; Flowcharts; Integrated circuit modeling; Logic gates; Testing; K longest path generation; Parameter variations; small-delay testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012
  • Conference_Location
    Dresden
  • ISSN
    1530-1591
  • Print_ISBN
    978-1-4577-2145-8
  • Type

    conf

  • DOI
    10.1109/DATE.2012.6176507
  • Filename
    6176507