Title :
An economical tdm design of multichannel Digital Down Converter
Author :
Luo, Feiteng ; Chen, Weidong
Author_Institution :
EEIS, Univ. of Sci.&Technol. of China, Hefei
Abstract :
Inspired by the idea of hardware time division multiplexing(TDM), a multi-channel digital down converter (DDC) is devised by exploring maximum resource reuse, which is realized by sharing memory, adders and multipliers among several independent channels, so that the resource cost is reduced significantly. Finally, a design example is implemented with FPGA, and simulations verify its feasibility.
Keywords :
convertors; field programmable gate arrays; time division multiplexing; FPGA; economical TDM design; hardware time division multiplexing; maximum resource reuse; memory sharing; multichannel digital down converter; Adders; Band pass filters; Costs; Field programmable gate arrays; Finite impulse response filter; Frequency; Hardware; Radar; Table lookup; Time division multiplexing;
Conference_Titel :
Signal Processing, 2008. ICSP 2008. 9th International Conference on
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-2178-7
Electronic_ISBN :
978-1-4244-2179-4
DOI :
10.1109/ICOSP.2008.4697179
