DocumentCode
1652316
Title
Impact of buried capping layer on TDDB physics of advanced interconnects
Author
Yiang, K.Y. ; Yoo, W.J. ; Krishnamoorthy, Ahila ; Tang, L.J.
Author_Institution
Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore, Singapore
fYear
2005
Firstpage
490
Lastpage
494
Keywords
buried layers; copper; electric breakdown; integrated circuit interconnections; integrated circuit metallisation; integrated circuit reliability; silicon compounds; tantalum; 100 Å; 105 degC; 800 Å; Cu-SiOC; Ta; barrier rupture; buried capping layer thickness effects; capping layer interface; failure mechanisms; interconnect TDDB physics; interconnect electrical reliability; lifetime performance degradation; low-k dielectrics; remnant hardmask; thermomechanical stress; time-dependent dielectric breakdown; Dielectric breakdown; Dielectric materials; Etching; Fabrication; Physics; Plasma applications; Plasma chemistry; Plasma materials processing; Silicon; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium, 2005. Proceedings. 43rd Annual. 2005 IEEE International
Print_ISBN
0-7803-8803-8
Type
conf
DOI
10.1109/RELPHY.2005.1493134
Filename
1493134
Link To Document