Title :
Design of a low-energy data processing architecture for WSN nodes
Author :
Walravens, Cedric ; Dehaene, Wim
Author_Institution :
ESAT-MICAS, K.U. Leuven, Heverlee, Belgium
Abstract :
Wireless sensor nodes require low-energy components given their limited energy supply from batteries or scavenging. Currently, they are designed around off-the-shelf low-power microcontrollers for on-the-node processing. However, by employing more appropriate hardware, the energy consumption can be significantly reduced. This paper identifies that many WSN applications employ algorithms which can be solved by using parallel prefix-sums. Therefore, an alternative architecture is proposed to calculated them energy-efficiently. It consists of several parallel processing elements (PEs) structured as a folded tree. Profiling SystemC models of the design with ActivaSC helps to improve data-locality. Measurements of the fabricated chip confirm an improvement of 10-20x in terms of energy as compared with traditional MCUs found in sensor nodes.
Keywords :
energy consumption; parallel processing; wireless sensor networks; ActivaSC; SystemC model profiling; WSN node; battery; data locality; energy consumption; energy efficiency; fabricated chip measurement; folded tree; low-energy data processing architecture design; off-the-shelf low-power microcontroller; on-the-node processing; parallel prefix-sums; parallel processing element; wireless sensor network node; Binary trees; Energy measurement; Gold; Reduced instruction set computing; Wireless sensor networks;
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012
Conference_Location :
Dresden
Print_ISBN :
978-1-4577-2145-8
DOI :
10.1109/DATE.2012.6176534
