First experimental demonstration of 100 nm inversion-mode InGaAs FinFET through damage-free sidewall etching

The first well-behaved inversion-mode InGaAs FinFET with gate length down to 100 nm with ALD Al₂O₃ as gate dielectric has been demonstrated. Using a damage-free sidewall etching method, FinFETs with L_ch down to 100 nm and W_Fin down to 40 nm are fabricated and characterized. In contrast to the severe short-channel effect (SCE) of the planar InGaAs MOSFETs at similar gate lengths, FinFETs have much better electro-static control and show improved S.S., DIBL and VT roll-off and less degradation at elevated temperatures. The SCE of III-V MOSFETs is greatly improved by the 3D structure design. The more accurate D_it estimation from the S.S. is also presented.