Title :
Memory interconnection test at board level
Author :
DeJong, F. ; deLindvanWijngaarden, A.J.
Keywords :
Algorithm design and analysis; Assembly; Circuit faults; Circuit testing; Integrated circuit interconnections; Logic devices; Logic testing; Pins; Random access memory; Surface-mount technology;
Conference_Titel :
Test Conference, 1992. Proceedings., International
Conference_Location :
Baltimore, MD
Print_ISBN :
0-7803-0760-7
DOI :
10.1109/TEST.1992.527840
