Title :
Advanced high-K gate dielectric for high-performance short-channel In0.7Ga0.3As quantum well field effect transistors on silicon substrate for low power logic applications
Author :
Radosavljevic, M. ; Chu-Kung, B. ; Corcoran, S. ; Dewey, G. ; Hudait, M.K. ; Fastenau, J.M. ; Kavalieros, J. ; Liu, W.K. ; Lubyshev, D. ; Metz, M. ; Millard, K. ; Mukherjee, N. ; Rachmady, W. ; Shah, U. ; Chau, Robert
Author_Institution :
Technol. & Manuf. Group, Intel Corp., Hillsboro, OR, USA
Abstract :
This paper describes integration of an advanced composite high-K gate stack (4nm TaSiOx-2nm InP) in the In0.7Ga0.3As quantum-well field effect transistor (QWFET) on silicon substrate. The composite high-K gate stack enables both (i) thin electrical oxide thickness (tOXE) and low gate leakage (JG) and (ii) effective carrier confinement and high effective carrier velocity (Veff) in the QW channel. The LG=75nm In0.7Ga0.3As QWFET on Si with this composite high-K gate stack achieves high transconductance of 1750¿S/¿m and high drive current of 0.49mA/¿m at VDS=0.5V.
Keywords :
III-V semiconductors; composite materials; field effect transistors; gallium arsenide; high-k dielectric thin films; indium compounds; low-power electronics; semiconductor quantum wells; In0.7Ga0.3As; QWFET; Si; TaSiOx-InP; composite high-K gate stack; drive current; effective carrier confinement; effective carrier velocity; gate leakage; high-k gate dielectric; low power logic applications; short-channel quantum well field effect transistors; silicon substrate; size 2 nm; size 4 nm; thin electrical oxide thickness; transconductance; voltage 0.5 V; Carrier confinement; Dielectric substrates; FETs; Gate leakage; High K dielectric materials; High-K gate dielectrics; Indium phosphide; Quantum wells; Silicon; Transconductance;
Conference_Titel :
Electron Devices Meeting (IEDM), 2009 IEEE International
Conference_Location :
Baltimore, MD
Print_ISBN :
978-1-4244-5639-0
Electronic_ISBN :
978-1-4244-5640-6
DOI :
10.1109/IEDM.2009.5424361
