• DocumentCode
    1653081
  • Title

    Evaluating memory architectures for media applications on coarse-grained reconfigurable architectures

  • Author

    Lee, Jong-eun ; Choi, Kiyoung ; Dutt, Nikil D.

  • Author_Institution
    EECS, Seoul Nat. Univ., South Korea
  • fYear
    2003
  • Firstpage
    172
  • Lastpage
    182
  • Abstract
    Reconfigurable ALU array (RAA) architectures - representing a popular class of coarse-grained reconfigurable architectures-are gaining in popularity especially for media applications due to their flexibility, regularity, and efficiency. In such architectures, memory is critical not only for configuration data but also for the heavy data traffic required by the application. Hence, system designers would like to evaluate the effects of different memory architectures and memory traffic early in the design process. We offer a scheme for system designers to quickly estimate the performance of media applications on RAA architectures. The proposed scheme is based on the performance-oriented model of RAA architectures, which we develop to model different memory architectures in a uniform way so as to allow for easy mapping of application loops and early performance estimation. Our experimental results estimating the performance of multimedia applications on three memory architectures demonstrate the flexibility of our memory architecture evaluation scheme as well as the varying effects of the memory architectures on the application performance, which also signifies the need for memory architecture evaluation early in the design process.
  • Keywords
    memory architecture; multimedia computing; reconfigurable architectures; software performance evaluation; systems analysis; RAA architecture; coarse-grained reconfigurable architecture; configuration data; data traffic; media application; memory architecture evaluation scheme; performance estimation; reconfigurable ALU array architecture; system design process; system designer; Acceleration; Application software; Computer architecture; Costs; Embedded computing; Memory architecture; Process design; Reconfigurable architectures; Switches; Traffic control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Application-Specific Systems, Architectures, and Processors, 2003. Proceedings. IEEE International Conference on
  • ISSN
    2160-0511
  • Print_ISBN
    0-7695-1992-X
  • Type

    conf

  • DOI
    10.1109/ASAP.2003.1212841
  • Filename
    1212841