DocumentCode
1653123
Title
Significance of including substrate capacitance in the full chip circuit model of ICs under CDM stress
Author
Sowariraj, M.S.B. ; De Jong, Peter C. ; Cora, S.M. ; Smedes, Theo ; Mouthaan, A. J Ton ; Kuper, Fred G.
Author_Institution
MESA Res. Inst., Twente Univ., Enschede, Netherlands
fYear
2005
Firstpage
608
Lastpage
609
Keywords
capacitance; capacitors; electric current; electrostatic discharge; semiconductor device models; substrates; CDM stress; ESD; IC circuit design; discharge current path; full chip circuit model; package capacitors; static charge sources; substrate capacitance; Capacitance; Capacitors; Circuit synthesis; Circuit testing; Fault location; Integrated circuit modeling; Integrated circuit packaging; Protection; Stress; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium, 2005. Proceedings. 43rd Annual. 2005 IEEE International
Print_ISBN
0-7803-8803-8
Type
conf
DOI
10.1109/RELPHY.2005.1493166
Filename
1493166
Link To Document