DocumentCode :
1653270
Title :
Novel DRAM cell with amplified capacitor for embedded application
Author :
Cho, Hyun-Jin ; Lin, Ming-Ren
Author_Institution :
Strategic Technol. Group, GLOBALFOUNDRIES, Inc., Sunnyvale, CA, USA
fYear :
2009
Firstpage :
1
Lastpage :
4
Abstract :
Novel DRAM cell with logic process compatible and whose memory operation is the same as the conventional DRAM operation is first time introduced. The cell uses the MOS capacitor with open base NPN bipolar transistor to amplify the storage capacitor. We fabricated the prototype cell and demonstrated the memory cell operation.
Keywords :
DRAM chips; MOS capacitors; embedded systems; DRAM cell; MOS capacitor; amplified capacitor; embedded application; memory cell operation; open base NPN bipolar transistor; storage capacitor; Bipolar transistors; Capacitance; Implants; Leakage current; Logic; MOS capacitors; Power supplies; Prototypes; Random access memory; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting (IEDM), 2009 IEEE International
Conference_Location :
Baltimore, MD
Print_ISBN :
978-1-4244-5639-0
Electronic_ISBN :
978-1-4244-5640-6
Type :
conf
DOI :
10.1109/IEDM.2009.5424372
Filename :
5424372
Link To Document :
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