Title :
Decimal multiplication via carry-save addition
Author :
Erle, Mark A. ; Schulte, Michael J.
Author_Institution :
Dept. of Electr. & Comput. Eng., Lehigh Univ., Bethlehem, PA, USA
Abstract :
Decimal multiplication is important in many commercial applications including financial analysis, banking, tax calculation, currency conversion, insurance, and accounting. We present two novel designs for fixed-point decimal multiplication that utilize decimal carry-save addition to reduce the critical path delay. First, a multiplier that stores a reduced number of multiplicand multiples and uses decimal carry-save addition in the iterative portion of the design is presented. Then, a second multiplier design is proposed with several notable improvements including fast generation of multiplicand multiples that do not need to be stored, the use of decimal (4:2) compressors, and a simplified decimal carry-propagate addition to produce the final product. When multiplying two n-digit operands to produce a 2n-digit product, the improved multiplier design has a worst-case latency of n+4 cycles and an initiation interval of n+1 cycles. Three data-dependent optimizations, which help reduce the multipliers´ average latency, are also described. The multipliers presented can be extended to support decimal floating-point multiplication.
Keywords :
carry logic; fixed point arithmetic; floating point arithmetic; multiplying circuits; carry-save addition; commercial applications; critical path delay; data-dependent optimization; fixed-point decimal multiplication; floating point multiplication; multiplier design; worst-case latency; Application software; Banking; Business; Compressors; Computer errors; Delay; Floating-point arithmetic; Hardware; Insurance; Iterative algorithms;
Conference_Titel :
Application-Specific Systems, Architectures, and Processors, 2003. Proceedings. IEEE International Conference on
Print_ISBN :
0-7695-1992-X
DOI :
10.1109/ASAP.2003.1212858