Author :
Krishnan, Siddarth A. ; Peterson, Jeff J. ; Young, Chadwin D. ; Brown, George ; Choi, Rino ; Harris, Rusty ; Sim, Jang Hoan ; Zeitzoff, Peter ; Kirsch, Paul ; Gutt, Jim ; Li, Hong Jyh ; Matthews, Ken ; Lee, Jack C. ; Byoung Hun Lee ; Bersuker, Gennadi
Author_Institution :
SEMATECH, Austin, TX, USA
Keywords :
CMOS integrated circuits; MOSFET; dielectric materials; electron traps; hafnium compounds; integrated circuit reliability; leakage currents; semiconductor device reliability; stress effects; titanium compounds; tunnelling; CMOS product flow; HfO2-TiN; SILC mechanisms; electron traps; electron tunneling; energy barrier; hafnium dioxide titanium nitride gate stacks; high-k dielectrics; nMOS transistors; pMOS transistors; silicon dioxide poly-silicon gate stacks; stress-induced degradation; stress-induced leakage current; threshold voltage shift; trap generation; Dielectric substrates; Electron traps; Hafnium oxide; High K dielectric materials; High-K gate dielectrics; Leakage current; MOS devices; MOSFETs; Stress measurement; Tin;
