Author :
Inoue, M. ; Yugami, J. ; Fujita, F. ; Shiga, K. ; Mizutani, M. ; Nomura, K. ; Tsuchimoto, J. ; Ohno, Y. ; Yoneda, M.
Keywords :
dielectric thin films; electron traps; hafnium compounds; hot carriers; insulated gate field effect transistors; interface states; semiconductor device reliability; silicon compounds; HfSiON; SiON; channel hot carrier stress; electron trapping efficiency; gate dielectric structure; gate insulator interface layer; gate insulator reliability; interface trapping; nFET; positive bias temperature stress; post-deposition-annealing; threshold voltage shift; Chemicals; Dielectrics; Electron traps; Hot carriers; Insulation; Plasma temperature; Reliability engineering; Stress; Thermal degradation; Threshold voltage;
