DocumentCode
1653698
Title
Optimization of emerging H.26L video encoder
Author
Lappalainen, Ville ; Hallapuro, Antti ; Hämäläinen, Timo D.
Author_Institution
Nokia Res. Center, Tampere, Finland
fYear
2001
fDate
6/23/1905 12:00:00 AM
Firstpage
406
Lastpage
415
Abstract
Two optimized implementations of the emerging ITU-T H.26L video encoder are described. The first, medium-optimized version, is implemented in C and the latter, highly optimized version, utilizes MMX assembly instructions. Comparisons to a correspondingly optimized H.263/H.263+ implementation are given with the spatial and temporal video quality fixed and the bit rate and complexity varied. On a 733 Pentium III processor, a real-time encoding speed of 10 fps for QCIF (quarter common intermediate format) sequences is achieved with a 29% reduction in bit rate compared to H.263+. The complexity of H.26L is about 3.4 times more than that of H.263+
Keywords
image sequences; optimisation; video coding; H.263+; ITU-T H.26L video encoder; MMX assembly instructions; Pentium III processor; QCIF sequences; optimization; real-time encoding speed; video coding standard; Assembly; Bit rate; Electronic mail; Encoding; Laboratories; Motion estimation; Telecommunication standards; Testing; Video coding; Video compression;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing Systems, 2001 IEEE Workshop on
Conference_Location
Antwerp
ISSN
1520-6130
Print_ISBN
0-7803-7145-3
Type
conf
DOI
10.1109/SIPS.2001.957368
Filename
957368
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