DocumentCode :
1653705
Title :
Agglomerative-based flip-flop merging with signal wirelength optimization
Author :
Liu, Sean Shih-Ying ; Lee, Chieh-Jui ; Chen, Hung-Ming
Author_Institution :
Inst. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fYear :
2012
Firstpage :
1391
Lastpage :
1396
Abstract :
In this paper, an optimization methodology using agglomerative-based clustering for number of flip-flop reduction and signal wirelength minimization is proposed. Comparing to previous works on flip-flop reduction, our method can obtain an optimal tradeoff curve between flip-flop number reduction and increase in signal wirelength. Our proposed methodology outperforms [1] and [12] in both reducing number of flip-flops and minimizing increase in signal wirelength. In comparison with [9], our methodology obtains a tradeoff of 15.8% reduction in flip-flop´s signal wirelength with 16.9% additional flip-flops. Due to the nature of agglomerative clustering, when relocating flip-flops, our proposed method minimizes total displacement by an average of 5.9%, 8.0%, 181.4% in comparison with [12], [1] and [9] respectively.
Keywords :
flip-flops; integrated circuit metallisation; minimisation of switching nets; agglomerative based flip-flop merging; optimization methodology; signal wirelength optimization; Clocks; Flip-flops; Joining processes; Libraries; Merging; Pins; Power demand;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012
Conference_Location :
Dresden
ISSN :
1530-1591
Print_ISBN :
978-1-4577-2145-8
Type :
conf
DOI :
10.1109/DATE.2012.6176580
Filename :
6176580
Link To Document :
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