High performance amorphous oxide thin film transistors with self-aligned top-gate structure

We have demonstrated self-aligned top-gate amorphous oxide TFTs for large size and high resolution displays. The processes such as source/drain and channel engineering have been developed to realize the self-aligned top gate structure. Ar plasma is exposed on the source/drain region of active layer to minimize the source/drain series resistances. To prevent the conductive channel, N₂O plasma is also treated on the channel region of active layer. We obtain a field effect mobility of 5.5 cm²/V·s, a threshold voltage of 1.1 V, and a sub-threshold swing of 0.35 V/decade at sub-micron a-GIZO TFTs with the length of 0.6 ¿m. Furthermore, a-IZO TFTs fabricated for gate and data driver circuits on glass substrate exhibit excellent electrical properties such as a field effect mobility of 115 cm²/V·s, a threshold voltage of 0.2 V, a sub-threshold swing of 0.2 V/decade, and low threshold voltage shift less than 1 V under bias temperature stress for 3 hr.