DocumentCode :
1653801
Title :
Verifying jitter in an analog and mixed signal design using dynamic time warping
Author :
Narayanan, Rajeev ; Daghar, Alaeddine ; Zaki, Mohamed H. ; Tahar, Sofiène
Author_Institution :
Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, QC, Canada
fYear :
2012
Firstpage :
1413
Lastpage :
1416
Abstract :
We present a variant of dynamic time warping (DTW) algorithm to verify jitter properties associated with an analog and mixed signal (AMS) design. First, the AMS design with stochastic jitter component is modeled using a system of difference equations for analog and digital parts and then evaluated in a MATLAB simulation environment. Second, MonteCarlo simulation is combined with DTW and hypothesis testing to determine the probability of acceptance/rejection of those simulation results. Our approach is illustrated on analyzing the jitter effect on the “lock-time” property of a phase locked loop (PLL) based frequency synthesizer.
Keywords :
Monte Carlo methods; frequency synthesizers; jitter; phase locked loops; AMS design; DTW algorithm; Matlab simulation; MonteCarlo simulation; PLL-based frequency synthesizer; acceptance-rejection probability; analog-mixed signal design; difference equations; dynamic time warping algorithm; jitter properties; jitter verification; lock-time property; phase locked loop; stochastic jitter component; Frequency synthesizers; Heuristic algorithms; Jitter; Mathematical model; Phase locked loops; Testing; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012
Conference_Location :
Dresden
ISSN :
1530-1591
Print_ISBN :
978-1-4577-2145-8
Type :
conf
DOI :
10.1109/DATE.2012.6176584
Filename :
6176584
Link To Document :
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