Title :
A novel five-photo-mask low-temperature polycrystalline-silicon CMOS structure
Author :
Sang-Jin Lee ; Lee, Sang-Jin ; Oh, Kum-Mi ; Kyung-Eon Lee ; Yang, Myoung-Su ; Hwang, Yong-Kee
Author_Institution :
LG Display R&D Center, Paju, South Korea
Abstract :
A novel five-mask low temperature polycrystalline silicon (LTPS) complementary metal oxide semiconductor (CMOS) structure was verified by manufacturing Thin Film Transistor (TFT) test samples using the proposed five-mask LTPS CMOS process. In integrating the five-mask CMOS structure, a selective contact barrier metal formation process was developed without additional photo mask steps to solve the issue of high contact resistance problem encountered inevitably in the contact between indium tin oxide ITO and doped poly-Si source/drain layers. The five-mask CMOS technology was also confirmed by manufacturing a five-mask CMOS panel to be acceptable for the active matrix liquid crystal display (AMLCD) application.
Keywords :
CMOS integrated circuits; integrated circuit manufacture; liquid crystal displays; masks; thin film transistors; ITO; active matrix liquid crystal display; five-photo-mask low-temperature polycrystalline-silicon CMOS structure; poly-Si source/drain layers; selective contact barrier metal formation process; Active matrix liquid crystal displays; CMOS process; CMOS technology; Indium tin oxide; Manufacturing processes; Semiconductor device manufacture; Semiconductor device testing; Silicon; Temperature; Thin film transistors;
Conference_Titel :
Electron Devices Meeting (IEDM), 2009 IEEE International
Conference_Location :
Baltimore, MD
Print_ISBN :
978-1-4244-5639-0
Electronic_ISBN :
978-1-4244-5640-6
DOI :
10.1109/IEDM.2009.5424393
