Title :
A new cell structure for sub-quarter micron high density flash memory
Author :
Yamauchi, Yoshimitsu ; Yoshimi, Masanori ; Sato, Sinichi ; Tabuchi, Hiroki ; Takenaka, Nobuyuki ; Sakiyam, Keizo
Author_Institution :
VLSI Res. Lab., Sharp Corp., Nara, Japan
Abstract :
A new cell structure named ACT (Asymmetrical Contactless Transistor) is proposed for high density data storage applications which require low voltage, low power consumption and fast program/erase. The ACT cell with a lightly doped source and heavily doped drain realizes a simple virtual ground array using the Fowler-Nordheim (FN) tunneling mechanism for both program and erase. A self-aligned floating-gate wing technology is introduced to increase gate coupling ratio in word-line direction without sacrificing cell area. A cell area as small as 0.39 μm2 with a coupling ratio of 0.55 is obtained using 0.3 μm process technology. The low programming current of the ACT cell enables multiple programming to be used and thus it is possible to achieve fast programming (<1 μs/byte) with a low single supply voltage (<3 V). A good disturb immunity in program, erase and read modes is also obtained
Keywords :
EPROM; integrated circuit technology; integrated memory circuits; 0.3 micron; 3 V; ACT cell structure; Fowler-Nordheim tunneling; asymmetrical contactless transistor; cell area; coupling ratio; disturb immunity; fast program/erase; heavily doped drain; high density data storage; lightly doped source; low power consumption; low voltage; multiple programming; self-aligned floating-gate wing technology; sub-quarter micron flash memory; virtual ground array; Boron; Energy consumption; Etching; Flash memory; Laboratories; Low voltage; Nonvolatile memory; Planarization; Tunneling; Very large scale integration;
Conference_Titel :
Electron Devices Meeting, 1995. IEDM '95., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-2700-4
DOI :
10.1109/IEDM.1995.499193