Title :
How much mismatch should be simulated in the high density SRAM sense amplifier design
Author_Institution :
New England Design Center, Cypress Semicond. Corp, Nashua, NH, USA
Keywords :
SRAM chips; amplifiers; circuit simulation; delays; integrated circuit design; integrated circuit yield; semiconductor device models; statistical analysis; circuit architecture; high density SRAM sense amplifier design; memory density; mismatch delay sensitivity; speed yield; static RAM; statistical model; Circuit simulation; Delay; Doping; MOS devices; MOSFET circuits; Probability; Random access memory; Semiconductor optical amplifiers; Semiconductor process modeling; Threshold voltage;
Conference_Titel :
Reliability Physics Symposium, 2005. Proceedings. 43rd Annual. 2005 IEEE International
Print_ISBN :
0-7803-8803-8
DOI :
10.1109/RELPHY.2005.1493198
