DocumentCode
1654039
Title
A framework for simulating hybrid MTJ/CMOS circuits: Atoms to system approach
Author
Panagopoulos, Georgios ; Augustine, Charles ; Roy, Kaushik
Author_Institution
Dept. of ECE, Purdue Univ., West Lafayette, IN, USA
fYear
2012
Firstpage
1443
Lastpage
1446
Abstract
A simulation framework that can comprehend the impact of material changes at the device level to the system level design can be of great value, especially to evaluate the impact of emerging devices on various applications. To that effect, we have developed a SPICE-based hybrid MTJ/CMOS (magnetic tunnel junction) simulator, which can be used to explore new opportunities in large scale system design. In the proposed simulation framework, MTJ modeling is based on Landau-Lifshitz-Gilbert (LLG) equation, incorporating both spin-torque and external magnetic field(s). LLG along with heat diffusion equation, thermal variations, and electron transport are implemented using SPICE-in built voltage dependent current sources and capacitors. The proposed simulation framework is flexible since the device dimensions such as MgO thickness and area, are user defined parameters. Furthermore, we have benchmarked this model with experiments in terms of switching current density (JC), switching time (TSWITCH) and tunneling magneto-resistance (TMR). Finally, we used our framework to simulate STT-MRAMs and magnetic flip-flops (MFF).
Keywords
CMOS integrated circuits; SPICE; capacitors; circuit simulation; current density; tunnelling magnetoresistance; LLG equation; Landau-Lifshitz-Gilbert equation; SPICE simulation; SPICE-in built voltage dependent current sources; STT-MRAM; capacitors; electron transport; external magnetic field; heat diffusion equation; hybrid MTJ-CMOS circuit simulation; large scale system design; magnetic flip-flops; magnetic tunnel junction simulator; spin-torque; switching current density; switching time; system level design; thermal variations; tunneling magnetoresistance; Integrated circuit modeling; Magnetic tunneling; Mathematical model; Resistance; SPICE; Semiconductor device modeling; Switches; LLG; MTJ; SPICE; STT-MRAM; simulation framework;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012
Conference_Location
Dresden
ISSN
1530-1591
Print_ISBN
978-1-4577-2145-8
Type
conf
DOI
10.1109/DATE.2012.6176592
Filename
6176592
Link To Document