Title :
On the feasibility of fT-integration employing reverse-active vertical npn´s
Author :
Khumsat, Phanumas ; Worapishet, Apisak ; Payne, Alison J.
Author_Institution :
Dept. of Electr. & Electron. Eng., Prince of Songkla Univ., Thailand
fDate :
6/23/1905 12:00:00 AM
Abstract :
The fT-integration technique is further investigated through the use of vertical n-p-n transistors operating in a so-called reverse-active mode for frequency tuning range extension. The usual DC-gain enhancement scheme can be deployed to compensate the associated low reverse current gain of such reverse-active devices with no degradation in linearity. An integrator using only reverse-active n-p-n´s was experimentally tested using general purpose n-p-n transistor arrays where it exhibits the DC-gain adjustable over 40 dB with the frequency range more than two octaves (0.86-4.20 MHz). Measured THD and IMD3 are below -48 dB and -46 dB respectively for output current signal peak at 50% modulation index, with SFDR=48d B. The experimental results also demonstrate that the use of such reverse-active device does not impose any performance degradation, particularly in terms of linearity
Keywords :
bipolar analogue integrated circuits; circuit tuning; compensation; continuous time filters; integrating circuits; radiofrequency filters; 0.86 to 4.2 MHz; CA3083 device; DC-gain enhancement scheme; THD; analogue circuits; bipolar transistors; fT integrator; fT-integration technique; frequency tuning range extension; general purpose NPN transistor arrays; linearity; reverse-active mode; transition frequency integrator; vertical n-p-n transistors; Current measurement; Degradation; Differential equations; Educational institutions; Frequency; Linearity; Microelectronics; Modulation; Testing; Tuning;
Conference_Titel :
Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on
Print_ISBN :
0-7803-7057-0
DOI :
10.1109/ICECS.2001.957415