Title :
ESD protection for deep-submicron CMOS technology using gate-couple CMOS-trigger lateral SCR structure
Author :
Ker, Ming-Dou ; Chang, Hun-Hsien ; Wu, Chung-Yu
Author_Institution :
Computer & Commun. Res. Labs., Ind. Technol. Res. Inst., Hsinchu, Taiwan
Abstract :
A novel ESD protection circuit, which first combines the advantages of complementary low-voltage-trigger SCR devices and the gate-couple technique, is proposed to more effectively protect the thinner gate oxide of deep submicron CMOS ICs without adding an extra ESD-implant mask. Experimental results have verified its excellent ESD-protection capability
Keywords :
CMOS integrated circuits; electrostatic discharge; protection; CMOS ICs; CMOS-trigger structure; ESD protection; deep-submicron CMOS technology; gate oxide; gate-couple technique; lateral SCR structure; Breakdown voltage; CMOS process; CMOS technology; Circuits; Electrostatic discharge; MOS devices; Protection; Robustness; Stress; Thyristors;
Conference_Titel :
Electron Devices Meeting, 1995. IEDM '95., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-2700-4
DOI :
10.1109/IEDM.1995.499279
