Title :
A neuron MOS transistor-based multiplier cell
Author :
Weber, Werner ; Prange, Stefan J. ; Thewes, Roland ; Wohlrab, Erdi
Author_Institution :
Corp. Res. & Dev., Siemens AG, Munich, Germany
Abstract :
Based on the neuron MOS transistor principle a multiplier circuit is designed for the first time. High-speed measurements are presented that qualify the principle of threshold logic for a new design principle. This represents a major breakthrough of packing density improvement of CMOS-based logic applications
Keywords :
CMOS logic circuits; logic design; multiplying circuits; threshold logic; CMOS-based logic applications; multiplier cell; neuron MOS transistor principle; packing density improvement; threshold logic; CMOS logic circuits; Capacitance; Coupling circuits; Dielectrics; Equations; Logic devices; MOSFETs; Neurons; Nonvolatile memory; Pulse inverters;
Conference_Titel :
Electron Devices Meeting, 1995. IEDM '95., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-2700-4
DOI :
10.1109/IEDM.1995.499282
