DocumentCode
1656956
Title
Towards improving simulation of analog circuits using model order reduction
Author
Aridhi, Henda ; Zaki, Mohamed H. ; Tahar, Sofiène
Author_Institution
Dept. of Electr. & Comput. Eng., Concordia Univ., Montréal, QC, Canada
fYear
2012
Firstpage
1337
Lastpage
1342
Abstract
Large analog circuit models are very expensive to evaluate and verify. New techniques are needed to shorten time-to-market and to reduce the cost of producing a correct analog integrated circuit. Model order reduction is an approach used to reduce the computational complexity of the mathematical model of a dynamical system, while capturing its main features. This technique can be used to reduce an analog circuit model while retaining its realistic behavior. In this paper, we present an approach to model order reduction of nonlinear analog circuits. We model the circuit using fuzzy differential equations and use qualitative simulation and K-means clustering to discretion efficiently its state space. Moreover, we use a conformance checking approach to refine model order reduction steps and guarantee simulation acceleration and accuracy. In order to illustrate the effectiveness of our method, we applied it to a transmission line with nonlinear diodes and a large nonlinear ring oscillator circuit. Experimental results show that our reduced models are more than one order of magnitude faster and accurate when compared to existing methods.
Keywords
analogue integrated circuits; computational complexity; differential equations; fuzzy set theory; integrated circuit modelling; pattern clustering; semiconductor diodes; K-means clustering; analog integrated circuit model; computational complexity; cost reduction; fuzzy differential equations; mathematical model; model order reduction; model order reduction steps; nonlinear analog circuits; nonlinear diodes; nonlinear ring oscillator circuit; qualitative simulation; time-to-market; transmission line; Analog circuits; Computational modeling; Equations; Integrated circuit modeling; Mathematical model; Transient analysis; Vectors;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012
Conference_Location
Dresden
ISSN
1530-1591
Print_ISBN
978-1-4577-2145-8
Type
conf
DOI
10.1109/DATE.2012.6176699
Filename
6176699
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