Title :
Approaching molecular nanodevices using engineered nanowire templates
Author_Institution :
UCLA, Los Angeles, CA, USA
Abstract :
This article presented the recent efforts in generating silicide-silicon-silicide heterostructures in individual synthetic silicon nanowires (NWs) through solid state reaction. The structure and electrical properties of the NW heterostructures were studied. Atomically sharp interfaces between Si and silicides were observed. It was also found that polycrystalline and single-crystalline silicide NWs are obtained at different conditions. Formation mechanism of poly vs single crystalline silicide structures will be discussed. Lastly, nanoscale devices utilizing the Si/silicide nanostructures were demonstrated. In specific, by choosing high work function PtSi as the contact, high performance nanoscale field-effect transistors were fabricated from intrinsic silicon nanowires, in which the source and drain contacts are defined by the metallic PtSi nanowire regions, and the gate length is defined by the Si nanowire region. Electrical measurements show nearly perfect p-channel enhancement mode transistor behavior and the best-performed intrinsic Si NW transistor to date. This work has demonstrated the potential of using silicide/Si NW heterostructure for nanometer regime device engineering. Noteably, the Si region in the NW heterostructure may be controlled down to sub-5 nm, well beyond the limit of current lithography technique. At the end of the talk, the potential of using NW heterostructures for studying material properties in the deep nanometer region was demonstrated, as well as the potential of using the NW heterostructures as a means to organize molecular scale devices.
Keywords :
elemental semiconductors; field effect transistors; lithography; molecular electronics; nanocontacts; nanofabrication; nanowires; semiconductor quantum wires; silicon; work function; Si; engineered nanowire templates; intrinsic silicon nanowires; lithography technique; molecular nanodevices; nanoscale field-effect transistors; nanostructures; p-channel enhancement mode transistor; polycrystalline silicide; silicide-silicon-silicide heterostructures; single-crystalline silicide; solid state reaction; source-drain contacts; synthetic silicon nanowires; work function; Contacts; Crystallization; Electric variables measurement; FETs; Lithography; Nanoscale devices; Nanostructures; Silicides; Silicon; Solid state circuits;
Conference_Titel :
Nanoelectronics Conference (INEC), 2010 3rd International
Conference_Location :
Hong Kong
Print_ISBN :
978-1-4244-3543-2
Electronic_ISBN :
978-1-4244-3544-9
DOI :
10.1109/INEC.2010.5424529