• DocumentCode
    1657159
  • Title

    A survey of dynamic power optimization techniques

  • Author

    Weng, Li-Chuan ; Wang, XiaoJun ; Liu, Bin

  • Author_Institution
    Sch. of Electron. Eng., Dublin City Univ., Ireland
  • fYear
    2003
  • Firstpage
    48
  • Lastpage
    52
  • Abstract
    One of the most important considerations for the current VLSI/SOC design is power, which can be classified into power analysis and optimization. In this survey, the main concepts of power optimization including the sources and policies are introduced. Among the various approaches, dynamic power management (DPM), which implies to change devices states when they are not working at the highest speed or at their full capacity, is the most efficient one. Our explanations accompanying the figures specify the abstract concepts of DPM. This paper briefly surveys both heuristic and stochastic policies and discusses their advantages and disadvantages.
  • Keywords
    VLSI; integrated circuit design; low-power electronics; optimisation; power consumption; system-on-chip; DPM; SOC design; VLSI design; dynamic power management; dynamic power optimization technique; power analysis; power dissipation; Capacitance; Capacitors; Circuits; Clocks; Continuous time systems; Energy consumption; Equations; Frequency; Switches; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    System-on-Chip for Real-Time Applications, 2003. Proceedings. The 3rd IEEE International Workshop on
  • Print_ISBN
    0-7695-1944-X
  • Type

    conf

  • DOI
    10.1109/IWSOC.2003.1213004
  • Filename
    1213004