DocumentCode :
1657180
Title :
The design of low-power fixed-point FIR differentiator IP blocks
Author :
Fox, T.W. ; Carreira, A. ; Turner, L.E.
fYear :
2003
Firstpage :
53
Lastpage :
58
Abstract :
This paper presents a method for the generation of low-power Finite duration Impulse Response (FIR) lowpass differentiator Intellectual Property (IP) blocks. The design problem is formulated as a discrete constrained optimization problem where the total squared frequency response approximation error is minimized subject to constraints on the power consumption and frequency response approximation error. It is demonstrated that the power consumption can be reduced while still satisfying the frequency response specifications.
Keywords :
FIR filters; low-power electronics; medical signal processing; power consumption; radar signal processing; approximation error; biomedical signal processing; bit-parallel differentiator; bit-serial differentiator; constrained optimization problem; differentiator power consumption; discrete optimization problem; finite duration impulse response; fixed-point FIR differentiator IP block; frequency response; intellectual property; low-power FIR differentiator IP block; radar signal processing; real-time tachometry processor; stopband attenuation; stopband energy; Approximation error; Attenuation; Constraint optimization; Design optimization; Energy consumption; Field programmable gate arrays; Finite impulse response filter; Frequency response; Intellectual property; Signal to noise ratio;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
System-on-Chip for Real-Time Applications, 2003. Proceedings. The 3rd IEEE International Workshop on
Print_ISBN :
0-7695-1944-X
Type :
conf
DOI :
10.1109/IWSOC.2003.1213005
Filename :
1213005
Link To Document :
بازگشت