DocumentCode
165735
Title
Ultra-low power SRAM cells with unconventional sizing
Author
Al Kaabi, M. ; Al Ali, A. ; Al Janahi, H. ; Al Kendi, M. ; Tache, M. ; Beiu, V.
Author_Institution
Coll. of Inf. Technol. (CIT), United Arab Emirates Univ. (UAEU), Al Ain, United Arab Emirates
fYear
2014
fDate
18-21 Aug. 2014
Firstpage
308
Lastpage
313
Abstract
Variations and noises are ubiquitous, but are still poorly understood and analyzed simplistically, leading in most cases to substantial overdesign. Lately, a novel reliability-centric design method based on unconventionally sizing transistors has been suggested. In this paper our goal is to design, simulate, analyze and compare the benefits of unconventional sizing when applied to ultra-low voltage/power/energy (ULV/P/E) SRAM cells. The re-sized SRAM cells are more reliable and have the potential to operate correctly at supply voltages below those achieved using classically sized SRAM cells. Our preliminary simulation results support such claims, while future directions of research will be suggested.
Keywords
SRAM chips; integrated circuit reliability; sizing (materials processing); ULV/P/E SRAM cell; reliability-centric design method; static random access memory cell; ultralow voltage/power/energy SRAM cell; unconventionally sizing; Logic gates; Noise; Optimized production technology; Reliability; SRAM cells; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Nanotechnology (IEEE-NANO), 2014 IEEE 14th International Conference on
Conference_Location
Toronto, ON
Type
conf
DOI
10.1109/NANO.2014.6968117
Filename
6968117
Link To Document