• DocumentCode
    165793
  • Title

    Memristor memory trade-offs and design considerations

  • Author

    Smaili, Sami ; Massoud, Yehia

  • Author_Institution
    Electr. & Comput. Eng. Dept., Worcester Polytech. Inst., Worcester, MA, USA
  • fYear
    2014
  • fDate
    18-21 Aug. 2014
  • Firstpage
    494
  • Lastpage
    498
  • Abstract
    The continuous demand for high storage capacities in modern electronic systems has made it more than ever important to find memory technologies beyond CMOS that are able to cope with the challenges at the nanoscale while catering to the requirements of high performance and robust operation. Memristors are excellent candidates for post CMOS memories, owing to their nanoscale nature and their programmability and ability to retain their state when turned off. In this paper we present design considerations for memristor memories for robust operation and discuss the trade-off between reading operations, refresh rates, and writing, stemming from the inherent variability of the memristor state when read.
  • Keywords
    CMOS memory circuits; integrated circuit design; memristors; nanoelectronics; design considerations; electronic systems; high storage capacity; memory technology; memristor memory trade-offs; nanoscale nature; post CMOS memory; Conferences; Integrated circuit modeling; Memristors; Nanotechnology; Noise; Resistance; Robustness;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Nanotechnology (IEEE-NANO), 2014 IEEE 14th International Conference on
  • Conference_Location
    Toronto, ON
  • Type

    conf

  • DOI
    10.1109/NANO.2014.6968147
  • Filename
    6968147