Isolation merged bit line cell (IMBC) for 1 Gb DRAM and beyond

Author

Park, J.K. ; Lee, J.Y. ; Hwang, B.H. ; Jo, S.Y. ; Kim, B.C. ; Jang, S.K. ; Kwon, S.D. ; Kim, D.H. ; Kim, H.S. ; Kim, K.N. ; Park, J.W. ; Lee, J.G.

Author_Institution

Semicond. R&D Center, Samsung Electron. Co. Ltd., Kyungki-Do, South Korea

fYear

1995

Firstpage

911

Lastpage

914

Abstract

The Isolation-Merged Bit Line Cell (IMBC) structure was investigated with 0.20 μm advanced Deep UV lithography as a candidate cell structure for 1 Gb DRAM and beyond. Better photo margin owing to the improvement of bit-line and global topology, easy formation of cell capacitor, simple process and better process margin were accomplished in IMBC. The electrical characteristics of IMBC was comparable to that of the conventional Capacitor Over Bit line (COB) cell. Moreover, the bit line coupling noise was significantly reduced in IMBC compared with COB. Thus, IMBC is a promising cell structure for 1 Gb DRAM and beyond

Keywords

DRAM chips; capacitors; cellular arrays; integrated circuit noise; integrated circuit technology; isolation technology; photolithography; 0.20 micron; 1 Gbit; DRAM; advanced deep UV lithography; bit line coupling noise; cell capacitor; cell structure; electrical characteristics; global topology; isolation merged bit line cell; photo margin; Capacitance; Capacitors; Circuit topology; Contacts; Electric variables; Fabrication; Lithography; Noise reduction; Random access memory; Semiconductor device noise;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1995. IEDM '95., International

Conference_Location

Washington, DC

ISSN

0163-1918

Print_ISBN

0-7803-2700-4

Type

conf

DOI

10.1109/IEDM.1995.499364

Filename

499364