An implementation of frame relay over ATM: cell MUX/DMUX

In this paper, we describe an implementation of cell MUX(multiplex)/DMUX(de-multiplex) to provide a high speed interface between FRIM(Frame Relay Interworking Module) and ALS(ATM Local switching Subsystem). The multiplex receives a cell stream from 16 frame relay subscriber access boards, and the multiplex performs UPC(Usage Parameter Control), cell head translation, EHEC generation, AAL type 5 segmentation, and ATM switch interface function. The de-multiplex classifies either user cell or IPC(Inter Processor Communication) cell received from a cell stream through an ATM switch, and the de-multiplex performs 64/53 octets conversion, AAL type 5 cell reassembly, HEC generation, handling of user cell, IPC cell, and OAM cell. And these functions are implemented by using FPGA, and they were simulated by logic simulation tool