DocumentCode
1658907
Title
Conditional techniques for low power consumption flip-flops
Author
Nedovic, Nikola ; Aleksic, Marko ; Oklobdzija, Vojin G.
Author_Institution
Dept. of Electr. & Comput. Eng., California Univ., Davis, CA, USA
Volume
2
fYear
2001
fDate
6/23/1905 12:00:00 AM
Firstpage
803
Abstract
Conditional capture and conditional precharge techniques for high-performance flip-flops are reviewed in terms of power and delay. It is found that application of conditional techniques can improve energy-delay product for up to 14% for 50% input activity and save more than 50% in power consumption for quiet input. This property makes conditional methods suitable for high-performance VLSI systems
Keywords
VLSI; flip-flops; logic simulation; low-power electronics; sequential circuits; VLSI systems; conditional capture techniques; conditional precharge techniques; energy-delay product; flip-flops; low power consumption; quiet input; Application software; Clocks; Cooling; Delay; Energy consumption; Flip-flops; Laboratories; Power engineering computing; Sampling methods; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on
Print_ISBN
0-7803-7057-0
Type
conf
DOI
10.1109/ICECS.2001.957596
Filename
957596
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