DocumentCode :
1659292
Title :
D/A conversion: amplitude and time error mapping optimization
Author :
Doris, Konstantinos ; Lin, Chieh ; Leenaerts, Domine ; Van Roermund, Arthur
Author_Institution :
Mixed-signal Microelectron. Group, Tech. Univ., Eindhoven, Netherlands
Volume :
2
fYear :
2001
fDate :
6/23/1905 12:00:00 AM
Firstpage :
863
Abstract :
In this paper, an investigation is made of how the topology dependent amplitude errors and time skews affect the output signal distortion of a digital to analog converter (DAC). The time nonlinearities caused by topology are highlighted as another obstacle that limits the spurious free dynamic range (SFDR). It is shown that proper error mapping can boost up the SFDR in addition to the obtainable static accuracy. A general framework and analysis of the error transfer is given and results of an efficient optimization algorithm are presented
Keywords :
circuit optimisation; digital-analogue conversion; error analysis; error statistics; network analysis; network topology; timing; D/A conversion; DAC; SFDR; amplitude error mapping optimization; digital to analog converter; error mapping; error transfer; optimization algorithm; output signal distortion; spurious free dynamic range; static accuracy; time error mapping optimization; topology dependent amplitude errors; topology dependent nonlinearities; topology dependent time skews; Algorithm design and analysis; Decoding; Digital-analog conversion; Distortion; Dynamic range; Laboratories; Linear code; Microelectronics; Timing; Topology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on
Print_ISBN :
0-7803-7057-0
Type :
conf
DOI :
10.1109/ICECS.2001.957610
Filename :
957610
Link To Document :
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