Title :
Routability-driven technology mapping for lookup table-based FPGAs
Author :
Schlag, Martine ; Kong, Jackson ; Chan, Pak K.
Author_Institution :
Dept. of Comput. Eng., California Univ., Santa Cruz, CA, USA
Abstract :
An algorithm for technology mapping of lookup-table-based field-programmable gate arrays is presented. It has the capability of producing slightly more compact designs than some existing mappers, and it offers the flexibility of trading routability with compactness of a design. The algorithm is implemented in the Rmap program and routability is compared with that of two other mappers. It is found that Rmap can produce mappings with better routability characteristics, and it produces routable mappings when other mappers do not
Keywords :
circuit layout CAD; logic arrays; table lookup; Rmap program; algorithm; lookup table-based FPGAs; routability driven technology mapping; routable mappings; Algorithm design and analysis; Circuits; Field programmable gate arrays; Logic arrays; Logic devices; Minimization; Routing; Software algorithms; Software design; Table lookup;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1992. ICCD '92. Proceedings, IEEE 1992 International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-3110-4
DOI :
10.1109/ICCD.1992.276201
