Title :
FPGA leakage power reduction using clb-clustering technique
Author :
Tohidi, M.M. ; Masoumi, Nasser
Author_Institution :
Sch. of ECE, Univ. of Tehran, Tehran, Iran
Abstract :
FPGAs with supply voltage programmability have been proposed recently to reduce FPGA power. In this paper, we propose CLB-clustering design technique that employs VDD programmable and power gating methods to reduce leakage in standby mode. Compared to the conventional VDD-programmable architecture, our architecture reduces the leakage power by - 32.78 dB with 2.32% more area.
Keywords :
field programmable gate arrays; leakage currents; CLB-clustering technique; FPGA leakage power reduction; VDD programmable method; power gating methods; Delay; Digital signal processing; Energy consumption; Energy efficiency; Energy management; Field programmable gate arrays; Leakage current; Logic circuits; Power transistors; Voltage;
Conference_Titel :
Nanoelectronics Conference (INEC), 2010 3rd International
Conference_Location :
Hong Kong
Print_ISBN :
978-1-4244-3543-2
Electronic_ISBN :
978-1-4244-3544-9
DOI :
10.1109/INEC.2010.5424701
