Interconnect modeling and design in high-speed VLSI/ULSI systems

A batch-oriented interconnect modeling system, IPDA (Interconnect Performance Design Assistant), developed for interconnect modeling and design in high-speed VLSI/ULSI systems, is presented. Intrachip communication is degraded by RC delay and crosstalk, and electromigration generates a serious reliability problem. Several approaches for alleviating these problems are quantitatively analyzed, and optimum approaches are recommended. In the interchip communication, reflection, crosstalk, and simultaneous switching noise, degrade the system performance. Approaches for solving these problems are introduced and analyzed for practical applications