• DocumentCode
    1662335
  • Title

    End-to-end testability analysis and DfT insertion for mixed-signal paths

  • Author

    Ozev, Sule ; Orailoglu, Alex

  • Author_Institution
    Duke Univ., Durham, NC, USA
  • fYear
    2004
  • Firstpage
    72
  • Lastpage
    77
  • Abstract
    Increasing system complexity and test cost demands new system-level solutions for mixed-signal systems. In this paper, we present a testability analysis and DfT insertion methodology for end-to-end mixed-signal paths. Based on behavioral models and path analysis, testability problems in the path are determined and classified in terms of their bottleneck. Possible solutions to each problem are identified. The DfT insertion problem is then formulated as a min-cost set cover problem to achieve the most cost-efficient solution. In experimental results where test point insertion is used as the DfT approach, nearly 50% reduction in the overall DfT overhead is achieved.
  • Keywords
    design for testability; integrated circuit testing; mixed analogue-digital integrated circuits; DfT insertion methodology; end-to-end testability analysis; mixed signal paths; mixed signal systems; path analysis; Automatic testing; Built-in self-test; Circuit testing; Costs; Frequency; Jitter; Manufacturing automation; Phase locked loops; Phase noise; System testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings. IEEE International Conference on
  • ISSN
    1063-6404
  • Print_ISBN
    0-7695-2231-9
  • Type

    conf

  • DOI
    10.1109/ICCD.2004.1347902
  • Filename
    1347902