DocumentCode
1662538
Title
Concurrent test scheduling in built-in self-test environment
Author
Chen, Chien-In Henry ; Yuen, Joel T.
Author_Institution
Dept. of Electr. Eng., Wright State Univ., Dayton, OH, USA
fYear
1992
Firstpage
256
Lastpage
259
Abstract
Concurrent testing is used to reduce overall self-testing time and further exploit the power of the built-in self-test (BIST) technique. A unifying procedure, called the implicit tree search algorithm (ITSA), is used to fully exploit the test parallelism so that both the total testing time and test resources are optimized. The operation of the ITSA is demonstrated by detailed examples
Keywords
VLSI; built-in self test; integrated circuit testing; IC testing; VLSI; built-in self-test environment; concurrent test scheduling; implicit tree search algorithm; self-testing time; test parallelism; test resources; unifying procedure; Automatic testing; Built-in self-test; Circuit testing; Costs; Design for testability; Driver circuits; Pattern analysis; Performance evaluation; Resource management; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design: VLSI in Computers and Processors, 1992. ICCD '92. Proceedings, IEEE 1992 International Conference on
Conference_Location
Cambridge, MA
Print_ISBN
0-8186-3110-4
Type
conf
DOI
10.1109/ICCD.1992.276263
Filename
276263
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