• DocumentCode
    1662552
  • Title

    BIST generators for sequential faults

  • Author

    Zhang, S. ; Byrne, R. ; Miller, D.M.

  • Author_Institution
    Dept. of Comput. Sci., Victoria Univ., BC, Canada
  • fYear
    1992
  • Firstpage
    260
  • Lastpage
    263
  • Abstract
    The authors consider faults with sequential behavior, e.g., delay or stuck-open faults, and discuss the state transition properties of linear-feedback-shift-register (LFSR) and one-dimensional linear-hybrid-cellular-automata (LHCA) test pattern generators. Upper and lower bounds on the transition coverage of any general n-cell generator with a period of 2n-1 are presented. It is shown that an XLHCA/XLFSR test pattern generator, which is derived from an LHCA/LFSR by grouping the odd and even numbered cell outputs, has superior transition coverage. On the basis of analysis and results of simulating the ISCAS´85 benchmark circuits, it is concluded that the XLHCA and XLFSR are excellent candidates for test pattern generators in BIST to detect faults with sequential behavior
  • Keywords
    built-in self test; cellular automata; delays; fault location; feedback; logic testing; shift registers; XLHCA/XLFSR test pattern generator; benchmark circuits; built-in self-test generators; delay; linear-feedback-shift-register; lower bounds; one-dimensional linear-hybrid-cellular-automata; sequential faults; state transition properties; stuck-open faults; upper bounds; Analytical models; Benchmark testing; Built-in self-test; Circuit faults; Circuit simulation; Delay; Electrical fault detection; Fault detection; Pattern analysis; Test pattern generators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 1992. ICCD '92. Proceedings, IEEE 1992 International Conference on
  • Conference_Location
    Cambridge, MA
  • Print_ISBN
    0-8186-3110-4
  • Type

    conf

  • DOI
    10.1109/ICCD.1992.276264
  • Filename
    276264