DocumentCode
1663215
Title
A CMOS low power voltage controlled oscillator with split-path controller
Author
Cheng, Kuo-Hsing ; Tzou, Lin-Jiunn ; Yang, Wei-Bin ; Sheu, Shyh-Shyuan
Author_Institution
Dept. of Electr. Eng., Tamkang Univ., Taipei Hsien, Taiwan
Volume
1
fYear
2001
fDate
6/23/1905 12:00:00 AM
Firstpage
421
Abstract
In this paper, the low power VCO is proposed and analyzed. A novel low power voltage controlled oscillator (VCO) is proposed to reduce the total power consumption of the Half-Digital Phase Locked Loop (HDPLL). By Hspice simulation results, the power-frequency ratio of low-power VCO can be reduced over 30% in comparison to conventional VCO. Thus, the novel low power VCO can be used in the low power HDPLL
Keywords
CMOS digital integrated circuits; digital phase locked loops; integrated circuit design; low-power electronics; voltage-controlled oscillators; 0.5 micron; CMOS low power VCO; CMOS voltage controlled oscillator; Hspice simulation; phase locked loop; power consumption; power-frequency ratio reduction; semi-digital PLL; split-path controller; Delay; Energy consumption; Frequency conversion; Phase detection; Phase frequency detector; Phase locked loops; Short circuit currents; Very large scale integration; Voltage control; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on
Print_ISBN
0-7803-7057-0
Type
conf
DOI
10.1109/ICECS.2001.957769
Filename
957769
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